The present invention generally relates to a method for optimizing matching network of semiconductor process apparatus by tuning source impedance with load impedance. More particularly, the present invention relates to a method for optimizing matching network of semiconductor process apparatus using neural network.
In many applications of semiconductor process apparatus, power source is connected to electric load. This is to maximize electric power transmitted to load. Such an object can be accomplished when output impedance of power source and input impedance of electric load have a relation of couple complex number to each other theoretically. However, in practical applications where user operates a semiconductor process apparatus, for example, a plasma etcher using radio frequency(xe2x80x9cRFxe2x80x9d) or microwave(xe2x80x9cMWxe2x80x9d) as power source and process chamber as electric load, probability that output impedance of power source have a relation of couple complex number to each other is poor. Therefore, so as to transmit maximum power to the process chamber, impedance matching network has to be established between the plasma source and the process chamber. Basically, impedance matching network acts as providing to source an impedance corresponding to couple complex number of output impedance and also acts as providing to electric load an impedance corresponding to couple complex number of input impedance. Thus, in impedance matching network are established a variable inductor and a variable capacitor electrically connected to each other. Therefore, in a case a semiconductor process apparatus is in need of impedance matching, it is controlled by complementarily handling the variable inductor and the variable capacitor.
As a merely example, two variable capacitors are established in the matching network of RF plasma source to tune the source with the load. In addition, in case of MW plasma source, three stubs are established in the tuner of the matching network, and is handled to tune impedance with electric load.
In use of such kinds of plasma sources, initial values of the matching network are fixed. For example, in case that RF plasma source is used, initial value of the two variable capacitors are fixed to a first given value, and in case MW plasma source is used, initial values of the three stubs are also fixed to a second given value.
Initial value, however, greatly affects impedance matching between source and load. This is due to difference in initial process recipes according to source electric power, gas pressure, flow rates of reactant gases, or RF power. Accordingly, it is desirable to provide an optimal method for ideal impedance matching.
Accordingly, it is an object of the present invention to attain ideal impedance matching by automatically designating initial values of recipe for the fabrication of a semiconductor device using neural network.
According to the invention, there is provided a method for optimizing matching network between an output impedance and an input impedance in a semiconductor process apparatus. The method comprises the steps of: providing a neural network capable of being trained through repeated learning; training the neural network from previously performed process conditions; setting up an initial value; comparing the initial value with a theoretically calculated value, to obtain error between the values; and repeating the training, setting, and comparing steps until the error becomes zero.